Logix Designer, RSLogix 500/5000, RSLinx, FactoryTalk and the faults you meet on a ControlLogix or CompactLogix line.
JMP, LBL and MCR on a ControlLogix: Skipping Rungs, and Why MCR Is Not a Stop Rung 14 of a filling machine carries OTL Glue_Pot_On and it sits between two MCR instructions. Open the guard, the zone goes false, every OTE inside it clears to 0 — and the glue pot stays hot, because a … Read more
One sentence in 1756-RM018A separates these two instructions: each time the DDT instruction finds a mismatch, the DDT instruction changes the reference bit to match the source bit, and the FBC instruction does not. Everything else about them — the operands, the two control structures, the result array, the fault codes, the 0.16 µs per … Read more
The Array operand on an SRT accepts SINT, INT, DINT and REAL, and 1756-RM018A prints no fifth entry. No structures, no strings, no array of a user-defined type — so on a 1756-L83E or a 5069-L330ERM alike, the instruction that sorts an array cannot sort records, and every design built on it deals with that … Read more
One STD instruction over a 1000-element array costs about 4.8 ms on a ControlLogix 5580. LOGIX-RM002B prints the four STD rows as 1.043 to 1.220 µs of overhead plus 4.79 to 4.96 µs for every element, and 1000 elements at the cheapest of those rows is 4790 µs. Call it 4.8 ms, on one rung, … Read more
Zeroing a 500-element DINT array with one FLL costs 0.087 + (500 × 0.04) microseconds on a ControlLogix 5580, which is 20 µs. Write the same job as a FOR loop around a CLR and LOGIX-RM002B gives you 0.268 + (500 × 1.05) for the loop and another 0.006 per CLR, so 528 µs — … Read more
Type 8 into the Length of a BSL whose array is DINT[8] and you have built a shift register eight positions long, not eight elements long, and the other 248 bits of that array will sit there untouched for the life of the machine. 1756-RM018A prints the reason in one line under Operands: Length is … Read more
A ControlLogix has no SQL client in it. What it has is a socket object on the Ethernet module, a WriteSocket service that carries 484 bytes at a time on a standard connection, and a MSG instruction whose default timeout is 30 seconds — which is 2500 scans of a 12 ms program. So a … Read more
Rockwell’s execution-time reference, LOGIX-RM002B, prints the FFL instruction on a ControlLogix 5580 as a flat 0.135 µs and the FFU beside it as 0.144 + (x × 0.07) µs. One half of the pair gets slower as the queue gets longer and the other half never does, and the reason sits in a different manual: … Read more
SWPB and Byte Order: The Day It Bites on a Modbus Register Two holding registers come back from a power meter as 16#43CF and 16#999A, a COP lands them in a REAL, and the line voltage on the screen reads -1.5951E-23. The meter is fine, the wiring is fine, and all four bytes arrived in … Read more
CMP or Five Rungs: One Expression Against the Discrete Compare Instructions Page 358 of 1756-RM018A puts the bitwise AND at order 7 of a CMP expression and the comparison operators at order 10. So an expression reading level > 20 AND level < 80 is not the band test it looks like — the controller … Read more
LIM and MEQ: Testing a Value Against a Window, and Against a Mask A LIM with a Low Limit of 4000 and a High Limit of 20000 passes the rung while a 4-20 mA input is in range. Type the same two numbers into the opposite fields and the instruction passes the rung for exactly … Read more
CTU, CTD and RES: The Count That Keeps Going Past the Preset buffer_count.ACC reads 41,206 against a preset of 500, and .DN has been true since some time on Tuesday. The line is running normally, the zone-full interlock has not released since then, and nobody can find the fault because there is not one. A … Read more