An S7-1500 an Hour Out After the Clocks Change: RD_SYS_T, RD_LOC_T and the Time Zone

The clock chain drawn as three stages: module time in UTC, the Bias and DaylightBias offsets from the configuration, and the local time that RD_LOC_T returns

The batch record says the mixer started at 06:14 and the operator watched it start at 07:14, on the Sunday the clocks moved. The CPU 1516-3 PN/DP is keeping perfect time. What is wrong is that somebody wired RD_SYS_T into the timestamp and RD_SYS_T hands back the module time, which on this family is always … Read more

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