FBC and DDT: Comparing an Array Against a Reference, and Which One Reports What

FBC and DDT operand blocks with Source InputState element 0, Reference GoodState element 0, Result Mismatch element 0, compare control CmpCtrl with Length 128, and result control ResCtrl with Length 32

One sentence in 1756-RM018A separates these two instructions: each time the DDT instruction finds a mismatch, the DDT instruction changes the reference bit to match the source bit, and the FBC instruction does not. Everything else about them — the operands, the two control structures, the result array, the fault codes, the 0.16 µs per … Read more

S7-1200 ERROR LED Flashing After an SM 1223 Swap: Read the Two LEDs Before the Buffer

The CPU and SM 1223 front panels drawn with their indicators named: STOP/RUN, ERROR and MAINT on the CPU, DIAG and the channel LEDs on the module

A new SM 1223 goes into slot 2, the panel comes back up, and the ERROR LED flashes red while the STOP/RUN LED sits solid yellow. The module that came out was 6ES7223-1BL32-0XB0. The one from stores is 6ES7223-1BL32-1XB0, and those two part numbers are the same sixteen inputs and sixteen outputs in the same … Read more

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